Nelson Correa, Antonio Garcia, Hugo Burbano, William Ricaurte
{"title":"用于语法识别的联想记忆处理器的ASIC设计与实现","authors":"Nelson Correa, Antonio Garcia, Hugo Burbano, William Ricaurte","doi":"10.1109/ASIC.1994.404559","DOIUrl":null,"url":null,"abstract":"This paper presents the ASIC design and implementation of a special purpose processor for syntactic recognition of context-free languages. The machine is an associative processor that takes advantage of the single-instruction multiple-data stream (SIMD) parallel processing capability of a content-addressable memory (CAM), designed to operate as a coprocessor in systems with an I.S.A. bus (IBM PC/AT). The processor is designed and implemented with multiple ASIC components, including both a full-custom content-addressable memory device and multiple Programmable Logic Devices (FPGA/PLD).<<ETX>>","PeriodicalId":354289,"journal":{"name":"Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"ASIC design and implementation of an associative memory processor for syntactic recognition\",\"authors\":\"Nelson Correa, Antonio Garcia, Hugo Burbano, William Ricaurte\",\"doi\":\"10.1109/ASIC.1994.404559\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the ASIC design and implementation of a special purpose processor for syntactic recognition of context-free languages. The machine is an associative processor that takes advantage of the single-instruction multiple-data stream (SIMD) parallel processing capability of a content-addressable memory (CAM), designed to operate as a coprocessor in systems with an I.S.A. bus (IBM PC/AT). The processor is designed and implemented with multiple ASIC components, including both a full-custom content-addressable memory device and multiple Programmable Logic Devices (FPGA/PLD).<<ETX>>\",\"PeriodicalId\":354289,\"journal\":{\"name\":\"Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-09-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1994.404559\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1994.404559","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
ASIC design and implementation of an associative memory processor for syntactic recognition
This paper presents the ASIC design and implementation of a special purpose processor for syntactic recognition of context-free languages. The machine is an associative processor that takes advantage of the single-instruction multiple-data stream (SIMD) parallel processing capability of a content-addressable memory (CAM), designed to operate as a coprocessor in systems with an I.S.A. bus (IBM PC/AT). The processor is designed and implemented with multiple ASIC components, including both a full-custom content-addressable memory device and multiple Programmable Logic Devices (FPGA/PLD).<>