超高频锁相环频率合成器的分数n杂散预测

1999 IEEE MTT-S International Topical Symposium on Technologies for Wireless Applications (Cat. No. 99TH8390) Pub Date : 1900-01-01 DOI:10.1109/MTTTWA.1999.755124

D. Butterfield, B. Sun

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引用次数: 14

摘要

快速的稳定时间加上窄通道间距和低相位噪声的冲突要求导致了分数n分频技术用于锁相环合成器。我们分析了任意模除序列的离散“拍音”杂散电平，包括经典累加器方法的杂散电平。结果与实测结果进行了比较。

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Prediction of fractional-N spurs for UHF PLL frequency synthesizers

Fast settling-time added to the already conflicting requirements of narrow channel spacing and low phase noise lead to fractional-N divider techniques for PLL synthesizers. We analyze discrete "beat-note" spurious levels from arbitrary modulus divide sequences including those from classic accumulator methods. The results are compared with measurements.

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1999 IEEE MTT-S International Topical Symposium on Technologies for Wireless Applications (Cat. No. 99TH8390)

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