{"title":"基于新型细胞重叠分析的分层电路提取器","authors":"H. Sawada","doi":"10.1109/ICCAD.1990.129891","DOIUrl":null,"url":null,"abstract":"An algorithm is presented for cell overlap analysis. With the hierarchical operations set introduced, any type of cell overlap can be mapped into each subcell. The cell abstract is automatically defined without any technology dependent descriptions and the hierarchical structure can be preserved. The algorithm is implemented in a hierarchical circuit extractor called HIPAS. This system can be used for a full chip with more than 200000 transistors.<<ETX>>","PeriodicalId":242666,"journal":{"name":"1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A hierarchical circuit extractor based on new cell overlap analysis\",\"authors\":\"H. Sawada\",\"doi\":\"10.1109/ICCAD.1990.129891\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An algorithm is presented for cell overlap analysis. With the hierarchical operations set introduced, any type of cell overlap can be mapped into each subcell. The cell abstract is automatically defined without any technology dependent descriptions and the hierarchical structure can be preserved. The algorithm is implemented in a hierarchical circuit extractor called HIPAS. This system can be used for a full chip with more than 200000 transistors.<<ETX>>\",\"PeriodicalId\":242666,\"journal\":{\"name\":\"1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-11-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCAD.1990.129891\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCAD.1990.129891","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A hierarchical circuit extractor based on new cell overlap analysis
An algorithm is presented for cell overlap analysis. With the hierarchical operations set introduced, any type of cell overlap can be mapped into each subcell. The cell abstract is automatically defined without any technology dependent descriptions and the hierarchical structure can be preserved. The algorithm is implemented in a hierarchical circuit extractor called HIPAS. This system can be used for a full chip with more than 200000 transistors.<>