J. Liu-Jimenez, R. Sánchez-Reillo, A. Lindoso, O. Miguel-Hurtado
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FPGA implementation for an iris biometric processor
Biometrics is nowadays one of the most promising techniques in authentication. Biometrics intends to identify a user by his/her physical and/or behavioural characteristic. Among all Biometric techniques, Iris recognition stands out, as its error rates are one of the lowest. The authors propose in this paper a hardware implementation based on FPGA for an iris biometric processor. By this solution a reduction of the processing time is obtained and security levels of the whole system are increased due to the reduction of software involved
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