{"title":"3gb /s,多点总线双向数据单端自适应均衡","authors":"H. Fredriksson, C. Svensson","doi":"10.1109/ISSOC.2007.4427445","DOIUrl":null,"url":null,"abstract":"This paper presents a design for single-ended adaptive equalization. The design enables mitigation of inter-symbol interference in communication systems where it is desirable to utilize signal processing resources on only one side of a communication channel. Utilizing the reciprocity principle we show that this idea is suitable for both point-to-point and point-to-multi-point links. Simulation results show that the presented design can mitigate ISI generated by a four drop memory bus at 3 Gb/s.","PeriodicalId":244119,"journal":{"name":"2007 International Symposium on System-on-Chip","volume":"8 2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"3-Gb/s, Single-ended Adaptive Equalization of Bidirectional Data over a Multi-drop Bus\",\"authors\":\"H. Fredriksson, C. Svensson\",\"doi\":\"10.1109/ISSOC.2007.4427445\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a design for single-ended adaptive equalization. The design enables mitigation of inter-symbol interference in communication systems where it is desirable to utilize signal processing resources on only one side of a communication channel. Utilizing the reciprocity principle we show that this idea is suitable for both point-to-point and point-to-multi-point links. Simulation results show that the presented design can mitigate ISI generated by a four drop memory bus at 3 Gb/s.\",\"PeriodicalId\":244119,\"journal\":{\"name\":\"2007 International Symposium on System-on-Chip\",\"volume\":\"8 2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 International Symposium on System-on-Chip\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSOC.2007.4427445\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 International Symposium on System-on-Chip","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSOC.2007.4427445","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
3-Gb/s, Single-ended Adaptive Equalization of Bidirectional Data over a Multi-drop Bus
This paper presents a design for single-ended adaptive equalization. The design enables mitigation of inter-symbol interference in communication systems where it is desirable to utilize signal processing resources on only one side of a communication channel. Utilizing the reciprocity principle we show that this idea is suitable for both point-to-point and point-to-multi-point links. Simulation results show that the presented design can mitigate ISI generated by a four drop memory bus at 3 Gb/s.