Fast AFC technique using a code estimation and binary search algorithm for wideband frequency synthesis

This paper presents some skills to improve locking property in wideband frequency synthesizers. To support a wide frequency range with a single on-chip voltage controlled oscillator (VCO) without deteriorating lock time, we introduce an adaptive frequency calibration (AFC) technique, which is using a code estimation and binary search algorithm to reduce the number of comparisons in AFC mode. In addition, by varying the threshold frequency, which is a criterion to discriminate one AFC code from others, in accordance with the requested VCO output frequency, the unnecessary transition time can be reduced during phase-locked loop (PLL) settling mode. A fractional-N frequency synthesizer with an on-chip LC VCO was implemented in 0.18-/spl mu/m CMOS technology to verify the performance. The measurement results showed less than 35-/spl mu/s AFC time with 5-bit AFC, and total lock time was found to be less than 65-/spl mu/s with 30 KHz PLL loop bandwidth. The frequency range was more than 400 MHz.