基于新内存寻址方案的高效节能内存FFT处理器设计

2006 Asia-Pacific Conference on Communications Pub Date : 2006-12-11 DOI:10.1109/APCC.2006.255899

Seungbeom Lee, Hyoungsoo Kim, Sin-Chong Park

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引用次数: 1

摘要

本文提出了一种新的内存寻址方案，用于实现高效节能的基于内存的FFT处理器。该方案是基于通过修改蝶形序列使接入系数最小化和减少开关活动。它还可以减少硬件规模，缩短关键路径延迟。因此，降低了复杂乘法器和存储器的功耗

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Design of Power-efficient Memory-based FFT Processor with New Memory Addressing Scheme

This paper presents a new memory-addressing scheme for the realization of power-efficient memory-based FFT processors. The scheme is based on the minimization of the coefficient access and reduction of switching activity by modifying the butterfly sequence. It also results in reducing hardware scale and shortening the critical path delay. Therefore, the power consumption in complex multiplier and memory is reduced

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2006 Asia-Pacific Conference on Communications

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