{"title":"多值数据均衡化的时域预强调技术","authors":"Y. Yuminaka, Yasunori Takahashi","doi":"10.1109/ISMVL.2008.40","DOIUrl":null,"url":null,"abstract":"This paper presents a new equalization technique based on a pulse-width modulation (PWM) pre-emphasis method which utilizes time-domain information processing to increase the data rate for a given bandwidth of VLSI interconnection. The pre-emphasis method does not change the pulse amplitude as for conventional FIR pre-emphasis, but instead exploits timing resolution. This fits well with recent CMOS technology trends toward higher switching speeds and lower voltage headroom. We discuss new time-domain pre-emphasis techniques especially for multiple-valued data transmission in order to achieve high-speed data transmission in VLSI systems.","PeriodicalId":243752,"journal":{"name":"38th International Symposium on Multiple Valued Logic (ismvl 2008)","volume":"204 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Time-Domain Pre-Emphasis Techniques for Equalization of Multiple-Valued Data\",\"authors\":\"Y. Yuminaka, Yasunori Takahashi\",\"doi\":\"10.1109/ISMVL.2008.40\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new equalization technique based on a pulse-width modulation (PWM) pre-emphasis method which utilizes time-domain information processing to increase the data rate for a given bandwidth of VLSI interconnection. The pre-emphasis method does not change the pulse amplitude as for conventional FIR pre-emphasis, but instead exploits timing resolution. This fits well with recent CMOS technology trends toward higher switching speeds and lower voltage headroom. We discuss new time-domain pre-emphasis techniques especially for multiple-valued data transmission in order to achieve high-speed data transmission in VLSI systems.\",\"PeriodicalId\":243752,\"journal\":{\"name\":\"38th International Symposium on Multiple Valued Logic (ismvl 2008)\",\"volume\":\"204 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"38th International Symposium on Multiple Valued Logic (ismvl 2008)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.2008.40\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"38th International Symposium on Multiple Valued Logic (ismvl 2008)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.2008.40","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Time-Domain Pre-Emphasis Techniques for Equalization of Multiple-Valued Data
This paper presents a new equalization technique based on a pulse-width modulation (PWM) pre-emphasis method which utilizes time-domain information processing to increase the data rate for a given bandwidth of VLSI interconnection. The pre-emphasis method does not change the pulse amplitude as for conventional FIR pre-emphasis, but instead exploits timing resolution. This fits well with recent CMOS technology trends toward higher switching speeds and lower voltage headroom. We discuss new time-domain pre-emphasis techniques especially for multiple-valued data transmission in order to achieve high-speed data transmission in VLSI systems.