高k介电常数沟槽LDMOS扩展场效应的解析模型

2013 IEEE International Conference of Electron Devices and Solid-state Circuits Pub Date : 2013-06-03 DOI:10.1109/EDSSC.2013.6628106

Xiarong Hu, Bo Zhang, X. Luo, Yongheng Jiang, K. Zhou, Zhaoji Li

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引用次数: 1

摘要

本文建立了高k介电常数沟槽型LDMOS扩展场板效应的解析模型。推导了带扩展场板的沟槽LDMOS的RESURF判据，分析结果和数值结果都表明，高k介电层增加了漂移掺杂。对击穿机理进行了分析，实现了介质层支撑电压与漂移区支撑电压相等的优化设计。当介电层厚度小于600nm时，高k材料的相对介电系数在4~12之间。高k材料介电常数过高会降低击穿电压。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Analytical model for an extended field plate effect on trench LDMOS with high-k permittivity

An analytical model for the extended field plate effect on trench LDMOS with high-k permittivity is presented in this paper. The RESURF criterion for the trench LDMOS with extended field plate is derived, both analytical and numerical results show the drift doping is increased with high-k dielectric layer. The analysis of the breakdown mechanism is researched, and an optimal design is achieved that the voltage supported by dielectric layer is equal to the voltage supported by the drift region. The relative dielectric coefficient of high-k materials are in the range of 4~12 when the thickness of the dielectric layer is below 600nm. The breakdown voltage is decreased for a too high permittivity of the high-k material.

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2013 IEEE International Conference of Electron Devices and Solid-state Circuits

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