{"title":"采用16nm CMOS技术跨功率域内部功率节点的CDM保护设计","authors":"Koki Narita, M. Okushima","doi":"10.1109/EOSESD.2016.7592557","DOIUrl":null,"url":null,"abstract":"This paper presents a CDM protection design for cross-domain interface circuits using an internal cross clamp as voltage divider between the internal power supply node of analog circuits and the digital GND node. The proposed protection circuit meets high CDM current request from large packaged IC with 16nm FinFET.","PeriodicalId":239756,"journal":{"name":"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"CDM protection design using internal power node for cross power domain in 16nm CMOS technology\",\"authors\":\"Koki Narita, M. Okushima\",\"doi\":\"10.1109/EOSESD.2016.7592557\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a CDM protection design for cross-domain interface circuits using an internal cross clamp as voltage divider between the internal power supply node of analog circuits and the digital GND node. The proposed protection circuit meets high CDM current request from large packaged IC with 16nm FinFET.\",\"PeriodicalId\":239756,\"journal\":{\"name\":\"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)\",\"volume\":\"150 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EOSESD.2016.7592557\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EOSESD.2016.7592557","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
CDM protection design using internal power node for cross power domain in 16nm CMOS technology
This paper presents a CDM protection design for cross-domain interface circuits using an internal cross clamp as voltage divider between the internal power supply node of analog circuits and the digital GND node. The proposed protection circuit meets high CDM current request from large packaged IC with 16nm FinFET.