Data flow graph mapping techniques of computer architecture with data driven computation model

Article introduces architecture of computer with data driven computation model based on principles of tile computing which is modern approach to multi-core design of microprocessors, with basic principle of cores layout in bi-directional mesh of cores with interconnecting communication network. Special attention is paid to description of data flow graph mapping technique and multi-mapping techniques proposed within this architecture. Hardware implementation of computers prototype with use of Xilinx Spartan 3 PCIe Starter board with Spartan 3 AN FPGA chip is also described. Architecture is developed at the Department of Computers and Informatics, Faculty of Electrical Engineering and Informatics, Technical University of Kosice. The work is one of reached results within projects VEGA 1/4071/07 and APVV 0073–07, being solved at the Department of Computers and Informatics, Faculty of Electrical Engineering and Informatics, Technical University of Košice.