数字脉宽脉位调制器在28纳米CMOS载波频率高达1ghz

J. Digel, M. Grozing, Martin Schmidt, M. Berroth, C. Haslach
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引用次数: 3

摘要

提出了一种能够为开关模式功率放大器提供脉冲序列的全数字脉宽脉位调制器(D-PWPM)。脉冲序列根据定义上升沿和下降沿位置的6位数字输入字生成,而不需要可调谐的模拟延迟单元。所有可能的边缘位置都是通过对载波频率倍数的数字输入时钟信号进行除法和相位插值得到的。CMOS选择器提供两个信号,将实际的上升沿和下降沿位置传递到特殊的对称CMOS NOR和NAND门。它们最终产生调制脉冲序列。D-PWPM采用28纳米低功耗CMOS技术制造,电路核心在1 V电源下耗散53mW。1 GHz载波的正弦双边带抑制载波调制证明了D-PWPM作为RF带通模式DAC工作的能力。载波频率为983.04MHz时,低频调制的SFDR为45.6 dB,奈奎斯特频率附近的SFDR为33.4 dB。用16-QAM演示了491.52MBit/s的数据传输。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Digital pulse-width pulse-position modulator in 28 nm CMOS for carrier frequencies up to 1 GHz
A fully digital pulse-width pulse-position modulator (D-PWPM) is proposed that is capable of providing pulse sequences for a switching-mode power amplifier. The pulse sequences are generated according to 6-bit digital input words defining the positions of the rising and falling edges without the need for tunable analog delay cells. All possible edge positions are derived by division and phase interpolation of a digital input clock signal that is a multiple of the carrier frequency. CMOS selectors provide two signals which carry the actual rising and falling edge positions to special symmetric CMOS NOR and NAND gates. They finally generate the modulated pulse sequence. The D-PWPM is fabricated in a 28 nm low-power CMOS technology and the circuit core dissipates 53mW from a 1 V supply. Sinusoidal double-sideband suppressed-carrier modulation of a 1 GHz carrier demonstrates the capability of the D-PWPM to operate as an RF bandpass mode DAC. With a carrier frequency of 983.04MHz, an SFDR of 45.6 dB is achieved for a low-frequency modulation and 33.4 dB near Nyquist frequency. Data transmission at 491.52MBit/s is demonstrated with a 16-QAM.
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