Ji-Hun Lee, Gyeong-Gu Kang, Min-Woo Ko, G. Cho, Hyunsik Kim
{"title":"一种8Ω、1.4W、0.0024% THD+N、桥系负载半侧开关模式的d类音频放大器，待机静态电流低至660μA","authors":"Ji-Hun Lee, Gyeong-Gu Kang, Min-Woo Ko, G. Cho, Hyunsik Kim","doi":"10.1109/VLSICircuits18222.2020.9162781","DOIUrl":null,"url":null,"abstract":"In this paper, a Class-D audio amplifier (CDA) with bridge-tied load half-side switching (BTLHS) mode is presented. The BTLHS mode through a digital pulse width subtracter (DPWS) enables a low quiescent current (IQ) by suspending the output switching in idle condition while maintaining high linearity with seamless zero-crossings and mode change. The CDA achieves 0.0024% THD+N, IQ of 0.66mA, and 95% peak efficiency on an 8Ω-speaker. The chip was fabricated in a 0.18-μm CMOS process, and it occupies 0.83mm2.","PeriodicalId":252787,"journal":{"name":"2020 IEEE Symposium on VLSI Circuits","volume":"119 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"An 8Ω, 1.4W, 0.0024% THD+N Class-D Audio Amplifier with Bridge-Tied Load Half-Side Switching Mode Achieving Low Standby Quiescent Current of 660μA\",\"authors\":\"Ji-Hun Lee, Gyeong-Gu Kang, Min-Woo Ko, G. Cho, Hyunsik Kim\",\"doi\":\"10.1109/VLSICircuits18222.2020.9162781\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a Class-D audio amplifier (CDA) with bridge-tied load half-side switching (BTLHS) mode is presented. The BTLHS mode through a digital pulse width subtracter (DPWS) enables a low quiescent current (IQ) by suspending the output switching in idle condition while maintaining high linearity with seamless zero-crossings and mode change. The CDA achieves 0.0024% THD+N, IQ of 0.66mA, and 95% peak efficiency on an 8Ω-speaker. The chip was fabricated in a 0.18-μm CMOS process, and it occupies 0.83mm2.\",\"PeriodicalId\":252787,\"journal\":{\"name\":\"2020 IEEE Symposium on VLSI Circuits\",\"volume\":\"119 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE Symposium on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSICircuits18222.2020.9162781\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSICircuits18222.2020.9162781","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An 8Ω, 1.4W, 0.0024% THD+N Class-D Audio Amplifier with Bridge-Tied Load Half-Side Switching Mode Achieving Low Standby Quiescent Current of 660μA
In this paper, a Class-D audio amplifier (CDA) with bridge-tied load half-side switching (BTLHS) mode is presented. The BTLHS mode through a digital pulse width subtracter (DPWS) enables a low quiescent current (IQ) by suspending the output switching in idle condition while maintaining high linearity with seamless zero-crossings and mode change. The CDA achieves 0.0024% THD+N, IQ of 0.66mA, and 95% peak efficiency on an 8Ω-speaker. The chip was fabricated in a 0.18-μm CMOS process, and it occupies 0.83mm2.
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