可穿戴式EEG采集高精度AFE设计方法

2021 IEEE 14th International Conference on ASIC (ASICON) Pub Date : 2021-10-26 DOI:10.1109/ASICON52560.2021.9620507

Chao Yuan, Ting Yi, Zhiliang Hong

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引用次数: 0

摘要

可穿戴式脑电图(EEG)采集系统对模拟前端(AFE)电路提出了偏置容限、共模抑制、低噪声和低功耗等更高的要求。本文介绍了可穿戴式EEG采集的设计挑战和电特性，回顾了两种主要的系统架构，并重点介绍了不同的电路技术，以提高关键性能指标，包括大动态范围(DR)、高输入阻抗(Zin)、低噪声、CM和电极偏移抑制。

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High Precision AFE Design Methodology for Wearable EEG Acquisition

Wearable electroencephalograph (EEG) acquisition sys-tem puts forward higher requirements for analog front-end (AFE) circuit, such as offset tolerance, common mode (CM) suppression, low noise and power consumption. This paper introduces design challenges and electrical characteristics of wearable EEG acquisition, reviews the two main system architectures, and focuses on different circuit techniques to improve key performance metrics, including large dynamic range (DR), high input impedance (Zin), low noise, CM and electrode offset rejection.

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2021 IEEE 14th International Conference on ASIC (ASICON)

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