一个16Kb的静态MTL/I2L存储器芯片

1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1980.1156078

S. Wiedmann, K. Heuber, W. Klein

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引用次数: 8

摘要

本文描述了一种采用标准2μm-epi双极工艺制作的45/100ns访问周期和170mW选择功率的实验性静态MTL存储芯片。该芯片- 17.4mm2-具有适用于MTL存储单元的设计概念。

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A 16Kb static MTL/I2L memory chip

An experimental static MTL memory chip with 45/100ns access cycle and 170mW select power, fabricated in standard 2μm-epi bipolar process, will be described. The chip - 17.4mm2- features a design concept adaptable to a MTL memory cell.

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来源期刊

1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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