用于门阵列设计的ASIC数据路径编译器的开发

[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design Pub Date : 1991-01-04 DOI:10.1109/ISVD.1991.185133

B. Mitra, K. Rao, S. Jha, J. Bagherli

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引用次数: 0

摘要

作者给出了用于门阵列设计的ASIC数据路径编译器的完整开发流程。描述了参数化数据路径元素的模块设计和使用流程。通过使用高度集成的设计环境实现的效率是突出的。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Development of ASIC datapath compilers for gate array designs

The authors present a complete development flow of ASIC datapath compilers for gate array designs. The module design and usage flow for the parameterized datapath elements is described. The efficiency achieved through the use of a highly integrated design environment is highlighted.<>

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来源期刊

[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design

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