稳健性扫描可测试cmos顺序电路

1991, Proceedings. International Test Conference Pub Date : 1991-10-26 DOI:10.1109/TEST.1991.519518

Bong-Hee Park, P. R. Menon

{"title":"稳健性扫描可测试cmos顺序电路","authors":"Bong-Hee Park, P. R. Menon","doi":"10.1109/TEST.1991.519518","DOIUrl":null,"url":null,"abstract":"In this paper, two methods of applying two-pattern tests for stuck-open faults in scan-testable CMOS sequential circuits are presented. These methods require shifting in only one pattern and require no special latches in the scan chain. Sufficient conditions for 110bust testability of all single FET stuck-open faults and design techniques for robustly scan-testable CMOS sequential circuits are presented. These techniques lead to realizations with at most two additional inputs and some additional FETS in the first-level gates.","PeriodicalId":272630,"journal":{"name":"1991, Proceedings. International Test Conference","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"ROBUSTLY SCAN-TESTABLE CMOS SEQUENTIAL CIRCUITS\",\"authors\":\"Bong-Hee Park, P. R. Menon\",\"doi\":\"10.1109/TEST.1991.519518\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, two methods of applying two-pattern tests for stuck-open faults in scan-testable CMOS sequential circuits are presented. These methods require shifting in only one pattern and require no special latches in the scan chain. Sufficient conditions for 110bust testability of all single FET stuck-open faults and design techniques for robustly scan-testable CMOS sequential circuits are presented. These techniques lead to realizations with at most two additional inputs and some additional FETS in the first-level gates.\",\"PeriodicalId\":272630,\"journal\":{\"name\":\"1991, Proceedings. International Test Conference\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-10-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1991, Proceedings. International Test Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TEST.1991.519518\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1991, Proceedings. International Test Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TEST.1991.519518","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 6

摘要

本文介绍了在扫描可测CMOS顺序电路中对卡开故障进行双模式测试的两种方法。这些方法只需要在一个模式中移动，并且在扫描链中不需要特殊的锁存器。给出了所有单场效应管卡断故障110胸围可测试性的充分条件和稳健性扫描可测试CMOS顺序电路的设计技术。这些技术导致实现最多有两个额外的输入和一些额外的fet在第一级栅极。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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ROBUSTLY SCAN-TESTABLE CMOS SEQUENTIAL CIRCUITS

In this paper, two methods of applying two-pattern tests for stuck-open faults in scan-testable CMOS sequential circuits are presented. These methods require shifting in only one pattern and require no special latches in the scan chain. Sufficient conditions for 110bust testability of all single FET stuck-open faults and design techniques for robustly scan-testable CMOS sequential circuits are presented. These techniques lead to realizations with at most two additional inputs and some additional FETS in the first-level gates.

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来源期刊

1991, Proceedings. International Test Conference

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