Jie Li, Liyi Xiao, Hongchen Li, Lulu Liao, Chenxu Wang
{"title":"一种用于时钟网络中抑制SET的高可靠性抗辐射时钟逆变单元","authors":"Jie Li, Liyi Xiao, Hongchen Li, Lulu Liao, Chenxu Wang","doi":"10.1109/ASICON47005.2019.8983515","DOIUrl":null,"url":null,"abstract":"With the technology node scaling down, clock network is becoming more and more vulnerable to SET. In this paper, a radiation hardened clock inverter cell is proposed for mitigating SET in the clock network. Theoretical analysis and simulation results show that the proposed cell can efficiently mask the SET pulse propagating in the clock network. And also, the proposed cell can solve the problem that a short path exists between power supply and ground when the cell is affected by SET. This avoids the critical threaten of the strong current on the circuit.","PeriodicalId":319342,"journal":{"name":"2019 IEEE 13th International Conference on ASIC (ASICON)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Radiation Hardened Clock Inverter Cell with High Reliability for Mitigating SET in Clock Network\",\"authors\":\"Jie Li, Liyi Xiao, Hongchen Li, Lulu Liao, Chenxu Wang\",\"doi\":\"10.1109/ASICON47005.2019.8983515\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"With the technology node scaling down, clock network is becoming more and more vulnerable to SET. In this paper, a radiation hardened clock inverter cell is proposed for mitigating SET in the clock network. Theoretical analysis and simulation results show that the proposed cell can efficiently mask the SET pulse propagating in the clock network. And also, the proposed cell can solve the problem that a short path exists between power supply and ground when the cell is affected by SET. This avoids the critical threaten of the strong current on the circuit.\",\"PeriodicalId\":319342,\"journal\":{\"name\":\"2019 IEEE 13th International Conference on ASIC (ASICON)\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE 13th International Conference on ASIC (ASICON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASICON47005.2019.8983515\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 13th International Conference on ASIC (ASICON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASICON47005.2019.8983515","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Radiation Hardened Clock Inverter Cell with High Reliability for Mitigating SET in Clock Network
With the technology node scaling down, clock network is becoming more and more vulnerable to SET. In this paper, a radiation hardened clock inverter cell is proposed for mitigating SET in the clock network. Theoretical analysis and simulation results show that the proposed cell can efficiently mask the SET pulse propagating in the clock network. And also, the proposed cell can solve the problem that a short path exists between power supply and ground when the cell is affected by SET. This avoids the critical threaten of the strong current on the circuit.