模拟设计的体偏置:22nm FD-SOI的实践经验

2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) Pub Date : 2017-04-01 DOI:10.1109/DDECS.2017.7934580

S. Rao, Benjamin Prautsch, A. Shrivastava, T. Reich

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引用次数: 2

摘要

本文介绍了超深亚微米FD-SOI技术体偏置控制在模拟和混合信号设计中的实际应用。车身偏置控制专用于高级数字电路中速度与功耗之间权衡的动态控制。然而，在这项工作中，我们的重点是权衡和改进模拟电路的性能。研究和设计了三种不同的电路:全CMOS带隙参考电路、500 MSps电流转向DAC和12位sigma-delta调制器。所有设计都在Globalfoundries的22纳米FD-SOI技术上进行了验证和实现。

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Body biasing for analog design: Practical experiences in 22 nm FD-SOI

This paper presents the practical application of body biasing control of ultra-deep submicron FD-SOI technologies for analog and mixed-signal designs. The body biasing control is dedicated for dynamic control of the trade-off between speed vs. power consumption for advanced digital circuits. However, in this work we focus on trading-off and improvement of analog circuit performances. Three different circuits were explored and designed: an all CMOS bandgap reference, a 500 MSps current-steering DAC, and a 12-bit sigma-delta modulator. All designs were verified and realized in Globalfoundries 22 nm FD-SOI technology.

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2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)

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