{"title":"自定时中断控制器:异步微架构设计的案例研究","authors":"A. De Gloria, P. Faraboschi, M. Olivieri","doi":"10.1109/ASIC.1994.404555","DOIUrl":null,"url":null,"abstract":"We report the results of the design and layout simulation of an interrupt controller dedicated to the SGS-Thomson ST9 microprocessor family. The unit is composed of a delay insensitive local control-path and a synchronous local data-path for priority computations. The local control-path is automatically synthesised out of an Occam algorithmic specification, while the local data-path is made up of conventional hardware units. Layout simulation shows that the average time for an interrupt to be served is reduced to 28%.<<ETX>>","PeriodicalId":354289,"journal":{"name":"Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit","volume":"93 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A self timed interrupt controller: a case study in asynchronous micro-architecture design\",\"authors\":\"A. De Gloria, P. Faraboschi, M. Olivieri\",\"doi\":\"10.1109/ASIC.1994.404555\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We report the results of the design and layout simulation of an interrupt controller dedicated to the SGS-Thomson ST9 microprocessor family. The unit is composed of a delay insensitive local control-path and a synchronous local data-path for priority computations. The local control-path is automatically synthesised out of an Occam algorithmic specification, while the local data-path is made up of conventional hardware units. Layout simulation shows that the average time for an interrupt to be served is reduced to 28%.<<ETX>>\",\"PeriodicalId\":354289,\"journal\":{\"name\":\"Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit\",\"volume\":\"93 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-09-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1994.404555\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1994.404555","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A self timed interrupt controller: a case study in asynchronous micro-architecture design
We report the results of the design and layout simulation of an interrupt controller dedicated to the SGS-Thomson ST9 microprocessor family. The unit is composed of a delay insensitive local control-path and a synchronous local data-path for priority computations. The local control-path is automatically synthesised out of an Occam algorithmic specification, while the local data-path is made up of conventional hardware units. Layout simulation shows that the average time for an interrupt to be served is reduced to 28%.<>
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