4nm电容器电介质的无氧化工艺

1992 Symposium on VLSI Technology Digest of Technical Papers Pub Date : 1992-06-02 DOI:10.1109/VLSIT.1992.200621

M. Nakano, N. Shinmura, K. Iguchi, T. Watanabe, K. Sakiyama

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引用次数: 4

摘要

讨论了一种由蒸汽HF处理器、N/sub /流量的晶圆载体箱和N/sub /流量负载锁定的SiN LPCVD系统组成的实现无天然氧化物SiN生成的集成工艺。结果表明，该方法可制备出等效氧化厚度为4 nm的ON膜，并有进一步改进的可能。因此，它有望成为64mb及以上DRAM的一项有前途的技术

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A native-oxide-free process for 4 nm capacitor dielectrics

An integrated process, composed of a vapor HF processor, a wafer carrier box with N/sub 2/ flow, and an SiN LPCVD system with N/sub 2/ flow load-lock, for realizing native-oxide free SiN formation is discussed. It has been found that an ON film having the equivalent oxide thickness of 4 nm can be obtained and further improvement may be possible. Therefore, it is expected to be a promising technology for the 64-Mb DRAM and beyond.<>

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1992 Symposium on VLSI Technology Digest of Technical Papers

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