芯片级封装焊料凸点的电迁移失效时间模拟

Shinan Wang, L. Liang, Yuanxiang Zhang, Y. Liu, S. Irving, T. Luk
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引用次数: 1

摘要

本文研究了芯片级封装焊点电迁移的数值模拟方法。建立了焊点可靠性的三维电迁移有限元模型。通过数值实验,得到了在大电流密度载荷下迁移破坏后的电场、热场和应力场。对电场、热场和应力场的间接耦合分析进行了研究和讨论。本文考虑了含SnPb和SnAgCu钎料的粘塑性和本构材料模型。研究了间接耦合多场的子模型技术。最后研究了球的形状、迹线宽度和UBM直径等几何参数对孔隙形成和电迁移失效时间(TTF)的影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Electromigration Time to Failure Simulation for Solder Bumps of a Chip Scale Package
This paper studies the numerical simulation method for electromigration in the solder joint of a chip scale package. The three dimensional electromigration finite element model for solder joint reliability is developed. Numerical experiments are carried out to obtain the electrical, thermal and stress fields with the migration failure under high current density loads. The indirect coupled analysis that includes electrical, thermal and stress fields are investigated and discussed. The viscoplastic and constitutive material model with both SnPb and SnAgCu solder materials is considered in the paper. The sub-model technique is studied with indirect coupled multiple fields. The impacts of geometry parameters, which include ball shape, trace width and UBM diameter for void formation and electromigration time to failure (TTF) are finally investigated.
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