Multilevel I2L with threshold gates

THE USE OF THRESHOLD FUNCTIONS in logic circuits has been under investigation for some time. In fact several practical ECL implementations1 ,2,3 have been proposed in the past. Threshold functions are rarely used in practice. They appear only where conventional logic implementation is unfeasible; e.g., partially or totally symmetric functions of many variables. The threshold gate has binary inputs and binary outputs. Its internal parameters are input weights w1 . . . . wn and threshold T. The gate forms the linear weighted sum of inputs and compares it to the threshold. The resulting output is “1” if the sum exceeds the threshold, and “0” otherwise. With a wide range of weights and thresholds possible, many functions can be realized by a single threshold gate. The class of functions realizable is the well known linearly separable functions . 12L/MTL is in essence a current-mode direct-coupled transistor logic. Like ECL, 12L can implement the following functions which are essential to the threshold gates: (1) input repzication create replicas of an input through current-mirror imaging; (2) input weighting predetermine weights to replicas; (3) weighted sums form arithmetic sum of several weighted replicas; and (4) threshold detection determine if sum cxceeds a predetermined threshold. 12L implementation can be sufficiently insensitive to power source variations for practical use. The 12L current-mirror5constitutes the main building block. Figure 1 (a) shows the circuit diagram of a currentmirror producing 3 replicas of an input; ( b ) shows top view of the device. It is known that since all 12L NPN collectors operate in the inverted mode, they are independent of each other in the sense that any of them may be saturated without affecting the others. The inaccuracy of the mirror due to the low beta can be sufficiently corrected by undersizing the feedback collector with respect to the others. Limited input weighting is obtained 4