带有DSA E/D NMOS预缩放器的200MHz锁相环CMOS LSI

1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1980.1156071

T. Uno, T. Saeki, Y. Nabeta, K. Fukui, T. Nezu

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引用次数: 0

摘要

将介绍一种采用DSA E/D nmos兼容n阱CMOS概念的200MHz单片锁相环。该方法最适合4b微处理器，简化了用于调谐系统的数字频率合成器的开发。

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A 200MHz PLL CMOS LSI with DSA E/D NMOS prescaler

A 200MHz single-chip PLL using a DSA E/D NMOS-compatihie N-well CMOS concept will be presented. Approach is best suited to 4b microprocessors simplifying development of digital frequency synthesizers for tuning systems.

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1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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