{"title":"一种用于并行计算机系统的自定义处理器","authors":"D. Wilde","doi":"10.1109/CICC.1989.56728","DOIUrl":null,"url":null,"abstract":"A 440000-transistor, full-custom CMOS processor that is used as the basis of a parallel computer system is described. The primary design goal was to produce a processor that performed roughly an order of magnitude faster than its predecessor. The author discusses the chip-level architecture of the processor, comparing it to the original design, and shows what was done architecturally to increase the performance by an order of magnitude","PeriodicalId":165054,"journal":{"name":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A custom processor for use in a parallel computer system\",\"authors\":\"D. Wilde\",\"doi\":\"10.1109/CICC.1989.56728\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 440000-transistor, full-custom CMOS processor that is used as the basis of a parallel computer system is described. The primary design goal was to produce a processor that performed roughly an order of magnitude faster than its predecessor. The author discusses the chip-level architecture of the processor, comparing it to the original design, and shows what was done architecturally to increase the performance by an order of magnitude\",\"PeriodicalId\":165054,\"journal\":{\"name\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"volume\":\"48 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-05-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1989.56728\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1989.56728","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A custom processor for use in a parallel computer system
A 440000-transistor, full-custom CMOS processor that is used as the basis of a parallel computer system is described. The primary design goal was to produce a processor that performed roughly an order of magnitude faster than its predecessor. The author discusses the chip-level architecture of the processor, comparing it to the original design, and shows what was done architecturally to increase the performance by an order of magnitude
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
