{"title":"一种多层逻辑单元优化的新方法","authors":"P. Poechmueller, M. Glesner","doi":"10.1109/ISVD.1991.185099","DOIUrl":null,"url":null,"abstract":"Presents new ideas in the field of multi-level logic optimization for automatic logic macrocell synthesis. A new approach is proposed which performs a quasi-parallel optimization of very different and complex tasks via a simulated annealing based expert system. A first working prototype software package for multilevel logic cell optimization had been implemented to prove the validity of this approach. The system performs a real architecture exploration, finding the best solution with respect to a certain cost-function which takes into account actual design parameters like speed, area, power, and not only indirect parameters like number of literals etc. Another feature is the small and primitive set of required rules.<<ETX>>","PeriodicalId":183602,"journal":{"name":"[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design","volume":"67 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-01-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A new approach for multilevel logic cell optimization\",\"authors\":\"P. Poechmueller, M. Glesner\",\"doi\":\"10.1109/ISVD.1991.185099\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Presents new ideas in the field of multi-level logic optimization for automatic logic macrocell synthesis. A new approach is proposed which performs a quasi-parallel optimization of very different and complex tasks via a simulated annealing based expert system. A first working prototype software package for multilevel logic cell optimization had been implemented to prove the validity of this approach. The system performs a real architecture exploration, finding the best solution with respect to a certain cost-function which takes into account actual design parameters like speed, area, power, and not only indirect parameters like number of literals etc. Another feature is the small and primitive set of required rules.<<ETX>>\",\"PeriodicalId\":183602,\"journal\":{\"name\":\"[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design\",\"volume\":\"67 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-01-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISVD.1991.185099\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVD.1991.185099","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new approach for multilevel logic cell optimization
Presents new ideas in the field of multi-level logic optimization for automatic logic macrocell synthesis. A new approach is proposed which performs a quasi-parallel optimization of very different and complex tasks via a simulated annealing based expert system. A first working prototype software package for multilevel logic cell optimization had been implemented to prove the validity of this approach. The system performs a real architecture exploration, finding the best solution with respect to a certain cost-function which takes into account actual design parameters like speed, area, power, and not only indirect parameters like number of literals etc. Another feature is the small and primitive set of required rules.<>