Innovative use of FA techniques SCM and OBIRCH along with TCAD to resolve junction scaling issues at advanced technology nodes

A novel device engineering approach is presented that combines three analysis methods to examine leakage in SRAM-like test structures at advanced technology nodes. This system exploits the physics of laser-based failure analysis, combined with carrier profile measurements by SCM, and TCAD simulation for verification of process conditions responsible for leakage. This system accounts for process non-uniformity, finds nonvisual implant differences, thoroughly proves which variations actually cause electrical problems, and eliminates spurious findings. We also provide two unique findings where different types of local implant distribution problems were shown to cause either reverse bias leakage or early diode turn-on at low voltage forward bias.