深层亚微米密集布局中互连电容提取的高效三维建模

Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078) Pub Date : 1999-01-01 DOI:10.1145/307418.307567

A. Toulouse, David Bernard, C. Landrault, P. Nouet

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引用次数: 2

摘要

本文介绍了一套用于层间电容三维建模的解析公式。过程表征方法保证了效率和准确性。然后证明互连电容的分析建模是查找表或数值模拟的有用替代方法。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Efficient 3D modelling for extraction of interconnect capacitances in deep submicron dense layouts

This paper introduces a set of analytical formulations for 3D modelling of inter-layer capacitances. Efficiency and accuracy are both guaranteed by the process characterization approach. Analytical modelling of interconnect capacitances is then demonstrated to be an helpful alternative to lookup tables or numerical simulations.

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Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078)

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