晶圆级聚合物光学通孔(TPOV)实现光学窗制造的高吞吐量

Z. Huang, R. Poelma, S. Vollebregt, M. H. Koelink, E. Boschman, R. Kropf, M. Gallouch, G.Q. Zhang
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摘要

介绍了聚合物光学通孔(TPOV)的制备工艺和封装方法。TPOV能够使用薄膜辅助成型(FAM)封装和封装硅光子系统,并创建微米尺寸的聚合物光学通孔。光学通孔在厚膜光刻胶(~ 300 μm)上进行光刻定义,并在衬底水平上进行平行加工。由于对校准精度,成本和吞吐量的严格要求,使用拾取和放置在单个芯片上放置和连接光学窗口是一个困难且耗时的过程。在这项工作中,我们通过将微加工技术与后端薄膜辅助成型技术相结合,为集成光学窗口提供了一种新的包装方法,从而解决了这个问题。作为可行性研究,我们展示了通过聚合物光学窗口的光学编码器硅光电二极管阵列。由此产生的微结构在感兴趣的光谱中是透明的,因此可以作为对基材的光学窗口。此外,我们的研究结果表明,采用fam技术可以实现和保护高纵横比(5:1)的微结构窗口。光学通过封装窗口精确定义(由于掩模限制,精度为±5 μm),可以显着提高吞吐量。包含多达1260个芯片和20160个窗口的单个晶圆的总工艺时间,包括层压,曝光和显影,大约需要1-1.5小时。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Wafer Level Through Polymer Optical Vias (TPOV) Enabling High Throughput of Optical Windows Manufacturing
This article shows the fabrication process and packaging of through polymer optical vias (TPOV). The TPOV enables encapsulation and packaging of silicon photonic systems using film assisted molding (FAM) and the creation of micron-sized through polymer optical vias. The optical vias are lithographically defined in thick film photo-resist (∼ 300 μm) and parallel processed on substrate level. Placing and connecting optical windows on individual chips using pick & place is a difficult and time-consuming process because of the stringent requirements on alignment accuracy, cost and throughput. In this work we provide a solution to this problem by combining microfabrication technology with back-end film assisted molding technology for a new packaging approach for the integration of optical windows. As feasibility study we show through polymer optical windows on optical encoder Si photodiode arrays. The resulting microstructures are transparent in the spectrum of interest and hence serve as optical windows towards the substrate. Furthermore, our results show that the high aspect ratio (5:1) micro structure windows can be achieved and protected using FAM-technology. The optical through package windows are accurately defined (±5 μm accuracy due to mask limitations) and can significantly improve the throughput. The total process time of a single wafer with up to 1260 chips and 20160 windows, including lamination, exposure and development, would approximately take 1-1.5 hours.
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