基于FPGA和ASIC实现的当前分组密码的VLSI架构

{"title":"基于FPGA和ASIC实现的当前分组密码的VLSI架构","authors":"J. Pandey, Tarun Goel, Mausam Nayak, Chhavi Mitharwal, Sajid Khan, S. Vishvakarma, A. Karmakar, Raj Singh","doi":"10.1007/978-981-13-5950-7_18","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"149 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A VLSI Architecture for the PRESENT Block Cipher with FPGA and ASIC Implementations\",\"authors\":\"J. Pandey, Tarun Goel, Mausam Nayak, Chhavi Mitharwal, Sajid Khan, S. Vishvakarma, A. Karmakar, Raj Singh\",\"doi\":\"10.1007/978-981-13-5950-7_18\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\",\"PeriodicalId\":270429,\"journal\":{\"name\":\"International Symposium on VLSI Design and Test\",\"volume\":\"149 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-06-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Symposium on VLSI Design and Test\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1007/978-981-13-5950-7_18\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Symposium on VLSI Design and Test","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1007/978-981-13-5950-7_18","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}