Y. F. Chang, L. Ji, Y. Chen, F. Zhou, T. Tsai, K. Chang, M. Chen, T. Chang, B. Fowler, E. Yu, J. Lee
{"title":"高密度纳米柱siox基阻性开关存储器采用纳米球光刻技术制造出一二极管一电阻(1D-1R)结构","authors":"Y. F. Chang, L. Ji, Y. Chen, F. Zhou, T. Tsai, K. Chang, M. Chen, T. Chang, B. Fowler, E. Yu, J. Lee","doi":"10.1109/VLSI-TSA.2014.6839674","DOIUrl":null,"url":null,"abstract":"A highly compact, one diode - one resistor (1D-1R) nano-pillar device architecture has been demonstrated using nano-sphere lithography (NSL) to fabricate SiOx-based resistive switching (RS) memory. The intrinsic SiOx-based resistive switching element and Si-based PN diode are self-aligned on the epitaxial silicon wafer using NSL and a deep-Si-etch process without using conventional photolithography. The DC electrical performance, an AC pulse response in the 50 ns regime, capability for multi-bit operation, and high readout margin immunity for sneak path issue demonstrate good potential for high-speed nonvolatile memory (NVM). The NSL fabrication process is an efficient, economical approach to enable large-scale patterning of 1D-1R architectures while providing excellent NVM performance for future applications.","PeriodicalId":403085,"journal":{"name":"Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"High-density nano-pillar SiOx-based resistive switching memory using nano-sphere lithography to fabricate a one diode - one resistor (1D-1R) architecture\",\"authors\":\"Y. F. Chang, L. Ji, Y. Chen, F. Zhou, T. Tsai, K. Chang, M. Chen, T. Chang, B. Fowler, E. Yu, J. Lee\",\"doi\":\"10.1109/VLSI-TSA.2014.6839674\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A highly compact, one diode - one resistor (1D-1R) nano-pillar device architecture has been demonstrated using nano-sphere lithography (NSL) to fabricate SiOx-based resistive switching (RS) memory. The intrinsic SiOx-based resistive switching element and Si-based PN diode are self-aligned on the epitaxial silicon wafer using NSL and a deep-Si-etch process without using conventional photolithography. The DC electrical performance, an AC pulse response in the 50 ns regime, capability for multi-bit operation, and high readout margin immunity for sneak path issue demonstrate good potential for high-speed nonvolatile memory (NVM). The NSL fabrication process is an efficient, economical approach to enable large-scale patterning of 1D-1R architectures while providing excellent NVM performance for future applications.\",\"PeriodicalId\":403085,\"journal\":{\"name\":\"Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)\",\"volume\":\"29 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-04-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSI-TSA.2014.6839674\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSI-TSA.2014.6839674","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High-density nano-pillar SiOx-based resistive switching memory using nano-sphere lithography to fabricate a one diode - one resistor (1D-1R) architecture
A highly compact, one diode - one resistor (1D-1R) nano-pillar device architecture has been demonstrated using nano-sphere lithography (NSL) to fabricate SiOx-based resistive switching (RS) memory. The intrinsic SiOx-based resistive switching element and Si-based PN diode are self-aligned on the epitaxial silicon wafer using NSL and a deep-Si-etch process without using conventional photolithography. The DC electrical performance, an AC pulse response in the 50 ns regime, capability for multi-bit operation, and high readout margin immunity for sneak path issue demonstrate good potential for high-speed nonvolatile memory (NVM). The NSL fabrication process is an efficient, economical approach to enable large-scale patterning of 1D-1R architectures while providing excellent NVM performance for future applications.