电网电压跌落下改进的正、负序分离锁相环的实现

Bing Chen, Chenyang Hei, Yuanpeng Guan, Yunxiang Xie, Zhiwu Zeng
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引用次数: 0

摘要

在电网电压下降的情况下,快速准确地检测和锁定共耦合点电压的相位和频率信息是并网逆变器顺利渡过故障的前提。为了在电压下降的情况下实现电网电压与相位、频率信息的快速同步,本文在静止参考框架锁相环的基础上,提出了一种改进的锁相环(PLL),简称DSCαβ-PLL。dsc αβ-锁相环可以分离和跟踪固定参考系中PCC的正序电压分量。然后对该方法进行了详细的推导,并给出了数学表达式。根据上述改进,在MATLAB/Simulink中建立了相应的锁相环仿真模型。结果表明,dsc αβ-锁相环不仅可以在不同类型的电压跌落中保持稳定,而且可以快速跟踪和锁定PCC电压的相位和频率信息。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Implementation of improved positive and negative sequences separation phase-locked loop under grid voltage sags
Detecting and locking the phase and frequency information of the voltage at point of common coupling (PCC) quickly and accurately under grid voltage sags is the premise of grid connected inverter which can ride through the fault successfully. In order to achieve grid voltage synchronize with phase and frequency information quickly under voltage sags, this paper proposed an improved Phase-Locked Loop (PLL), which is referred to as DSCαβ-PLL, based on the stationary references frame PLL. The DSCαβ-PLL can separate and track the positive-sequence voltage component of PCC in the stationary references frame. Then the proposed method is deduced in detail, and math expressions are presented next. According to above improvements, the relevant PLL simulation model is built in MATLAB/Simulink. The results show that the DSCαβ-PLL can not only be stable in different types of voltage sags, but also can track and lock the phase and frequency information of the voltage at PCC fast.
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