{"title":"基于高级决策图的自动软件自测程序生成","authors":"Artjom Jasnetski, R. Ubar, A. Tsertov","doi":"10.1109/LATW.2016.7483357","DOIUrl":null,"url":null,"abstract":"Software-Based Self-Testing (SBST) is a well-known non-intrusive method for testing microprocessors. This paper presents an approach for automatic SBST program generation, based on the methodology of using High-Level Decision Diagrams (HLDD) for modeling microprocessors and faults. The novelty of this approach is that Instruction Set Architecture (ISA) of the processor is the only needed input data for the automated test program generator.","PeriodicalId":135851,"journal":{"name":"2016 17th Latin-American Test Symposium (LATS)","volume":"147 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"On automatic software-based self-test program generation based on high-level decision diagrams\",\"authors\":\"Artjom Jasnetski, R. Ubar, A. Tsertov\",\"doi\":\"10.1109/LATW.2016.7483357\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Software-Based Self-Testing (SBST) is a well-known non-intrusive method for testing microprocessors. This paper presents an approach for automatic SBST program generation, based on the methodology of using High-Level Decision Diagrams (HLDD) for modeling microprocessors and faults. The novelty of this approach is that Instruction Set Architecture (ISA) of the processor is the only needed input data for the automated test program generator.\",\"PeriodicalId\":135851,\"journal\":{\"name\":\"2016 17th Latin-American Test Symposium (LATS)\",\"volume\":\"147 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-04-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 17th Latin-American Test Symposium (LATS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/LATW.2016.7483357\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 17th Latin-American Test Symposium (LATS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LATW.2016.7483357","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
On automatic software-based self-test program generation based on high-level decision diagrams
Software-Based Self-Testing (SBST) is a well-known non-intrusive method for testing microprocessors. This paper presents an approach for automatic SBST program generation, based on the methodology of using High-Level Decision Diagrams (HLDD) for modeling microprocessors and faults. The novelty of this approach is that Instruction Set Architecture (ISA) of the processor is the only needed input data for the automated test program generator.