Tae-Jin Lee, Junho Kim, Hyungsoo Kim, Piljung Jun, Joungho Kim
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The Improvement of Signal Integrity (SI) according to The Location of Via in The Vicinity of A Slot in The Reference Plane
Signal integrity (SI) is affected by the location of via in the vicinity of slot. In multiple planar layer circuitry, when a signal trace changes layer through via, whether there is a slot in the reference plane beneath the signal trace or not has effects on signal integrity (SI). In this paper, the improved efficiency on signal integrity (SI) according to the location of via in the vicinity of slot is seen through simulation and measurement. The reduction of slot efficiency to provide isolation of a noise source from the rest of the PCB is also shown when a via is placed through the slot. Finally, design rule for the location of via in the vicinity of slot in the nearest reference plane is also discussed.
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