D. Dideban, B. Cheng, N. Moezi, Xingsheng Wang, A. Asenov
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引用次数: 0
摘要
本文针对目前最先进的35nm MOSFET器件,在HSPICE中研究并仿真了由compact modeling Council (CMC)选择作为BSIM4继任者的PSP compact模型的电容分量。仿真结果与TCAD结果进行了比较,显示了紧凑模型的精度对实际电路仿真的影响。
Evaluation of 35nm MOSFET capacitance components in PSP compact model
In this paper the capacitance components of the PSP compact model which is selected as successor of BSIM4 by the Compact Modelling Council (CMC) are investigated and simulated in HSPICE for the state of the art 35nm MOSFET device. The simulations are compared with TCAD results in both transcapacitance components between the device terminals and time domain to show the impact of accuracy of compact model on real circuit simulations.