{"title":"CMOS SOI比较器的设计","authors":"Erik Säll, M. Vesterbacka","doi":"10.1109/IWSOC.2004.1319884","DOIUrl":null,"url":null,"abstract":"This paper gives an introduction to the silicon-on-insulator (SOI) CMOS technology and presents the major advantages and disadvantages of using SOI. It also presents the design of a comparator, which has been sent for manufacturing, designed in a 0.13 /spl mu/m partially depleted SOI CMOS process. The comparator is a first step towards the design of a complete 6-bit flash analog-to-digital converter, with a sampling frequency of 1.5 GHz.","PeriodicalId":306688,"journal":{"name":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","volume":"71 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-07-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"Design of a comparator in CMOS SOI\",\"authors\":\"Erik Säll, M. Vesterbacka\",\"doi\":\"10.1109/IWSOC.2004.1319884\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper gives an introduction to the silicon-on-insulator (SOI) CMOS technology and presents the major advantages and disadvantages of using SOI. It also presents the design of a comparator, which has been sent for manufacturing, designed in a 0.13 /spl mu/m partially depleted SOI CMOS process. The comparator is a first step towards the design of a complete 6-bit flash analog-to-digital converter, with a sampling frequency of 1.5 GHz.\",\"PeriodicalId\":306688,\"journal\":{\"name\":\"4th IEEE International Workshop on System-on-Chip for Real-Time Applications\",\"volume\":\"71 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-07-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"4th IEEE International Workshop on System-on-Chip for Real-Time Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWSOC.2004.1319884\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWSOC.2004.1319884","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper gives an introduction to the silicon-on-insulator (SOI) CMOS technology and presents the major advantages and disadvantages of using SOI. It also presents the design of a comparator, which has been sent for manufacturing, designed in a 0.13 /spl mu/m partially depleted SOI CMOS process. The comparator is a first step towards the design of a complete 6-bit flash analog-to-digital converter, with a sampling frequency of 1.5 GHz.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
