{"title":"量化模拟RX前端的SAW-Less应用","authors":"J. Musayev, A. Liscidini","doi":"10.1109/ESSCIRC.2018.8494308","DOIUrl":null,"url":null,"abstract":"A quantized analog RX front-end is presented, where the input signal is split and processed by an array of RF analog front-ends. This approach allows to expand the dynamic range of the receiver while keeping a low power and a low voltage supply. A prototype integrated in 65nm CMOS technology shows a compression point up to 10.5dBm, IIP3 between 1 to 20.5dBm and IIP2 between 45 to 75dBm, a noise figure in sensitivity equal to 1.9dB while consuming 14mW for the analog signal amplification and 37.5mW/GHz for the clock generation and distribution. The active area is only 0.25mm2.","PeriodicalId":355210,"journal":{"name":"ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Quantized Analog RX Front-End for SAW-Less Applications\",\"authors\":\"J. Musayev, A. Liscidini\",\"doi\":\"10.1109/ESSCIRC.2018.8494308\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A quantized analog RX front-end is presented, where the input signal is split and processed by an array of RF analog front-ends. This approach allows to expand the dynamic range of the receiver while keeping a low power and a low voltage supply. A prototype integrated in 65nm CMOS technology shows a compression point up to 10.5dBm, IIP3 between 1 to 20.5dBm and IIP2 between 45 to 75dBm, a noise figure in sensitivity equal to 1.9dB while consuming 14mW for the analog signal amplification and 37.5mW/GHz for the clock generation and distribution. The active area is only 0.25mm2.\",\"PeriodicalId\":355210,\"journal\":{\"name\":\"ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2018.8494308\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2018.8494308","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Quantized Analog RX Front-End for SAW-Less Applications
A quantized analog RX front-end is presented, where the input signal is split and processed by an array of RF analog front-ends. This approach allows to expand the dynamic range of the receiver while keeping a low power and a low voltage supply. A prototype integrated in 65nm CMOS technology shows a compression point up to 10.5dBm, IIP3 between 1 to 20.5dBm and IIP2 between 45 to 75dBm, a noise figure in sensitivity equal to 1.9dB while consuming 14mW for the analog signal amplification and 37.5mW/GHz for the clock generation and distribution. The active area is only 0.25mm2.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
