{"title":"硅双极ECL电路的低温运行","authors":"J. Cressler, D. Tang, K. Jenkins, G. P. Li","doi":"10.1109/ISSCC.1989.48266","DOIUrl":null,"url":null,"abstract":"Silicon bipolar transistors with current gain as high as 80 at 77 K are described. ECL (emitter-coupled-logic) circuits using these transistors are operational at low temperatures with no degradation in circuit speed observed until about 165 K as compared to its speed at a typical system operating temperature of 358 K (85 degrees C). The key design and performance issues for low-temperature operation of bipolar (or BiCMOS) circuits are addressed. The device used in the investigation is a scaled double-poly self-aligned transistor. Transistor small-signal response measured by standard S-parameter techniques as a function of temperature is shown. The static noise margin improves at low temperatures, suggesting that reduction of circuit logic swings will be possible. State gain can be greater than unity with V/sub L/ less than 200 mV at 85 K provided the pull-up resistance to emitter resistance ratio is kept sufficiently large.<<ETX>>","PeriodicalId":385838,"journal":{"name":"IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-02-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Low-temperature operation of silicon bipolar ECL circuits\",\"authors\":\"J. Cressler, D. Tang, K. Jenkins, G. P. Li\",\"doi\":\"10.1109/ISSCC.1989.48266\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Silicon bipolar transistors with current gain as high as 80 at 77 K are described. ECL (emitter-coupled-logic) circuits using these transistors are operational at low temperatures with no degradation in circuit speed observed until about 165 K as compared to its speed at a typical system operating temperature of 358 K (85 degrees C). The key design and performance issues for low-temperature operation of bipolar (or BiCMOS) circuits are addressed. The device used in the investigation is a scaled double-poly self-aligned transistor. Transistor small-signal response measured by standard S-parameter techniques as a function of temperature is shown. The static noise margin improves at low temperatures, suggesting that reduction of circuit logic swings will be possible. State gain can be greater than unity with V/sub L/ less than 200 mV at 85 K provided the pull-up resistance to emitter resistance ratio is kept sufficiently large.<<ETX>>\",\"PeriodicalId\":385838,\"journal\":{\"name\":\"IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-02-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1989.48266\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1989.48266","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Low-temperature operation of silicon bipolar ECL circuits
Silicon bipolar transistors with current gain as high as 80 at 77 K are described. ECL (emitter-coupled-logic) circuits using these transistors are operational at low temperatures with no degradation in circuit speed observed until about 165 K as compared to its speed at a typical system operating temperature of 358 K (85 degrees C). The key design and performance issues for low-temperature operation of bipolar (or BiCMOS) circuits are addressed. The device used in the investigation is a scaled double-poly self-aligned transistor. Transistor small-signal response measured by standard S-parameter techniques as a function of temperature is shown. The static noise margin improves at low temperatures, suggesting that reduction of circuit logic swings will be possible. State gain can be greater than unity with V/sub L/ less than 200 mV at 85 K provided the pull-up resistance to emitter resistance ratio is kept sufficiently large.<>