Sibani Bisoyi, S. P. Tiwari, U. Zschieschang, H. Klauk
{"title":"栅极和漏极偏置对柔性有机薄膜晶体管偏置应力稳定性的影响","authors":"Sibani Bisoyi, S. P. Tiwari, U. Zschieschang, H. Klauk","doi":"10.1109/ICEMELEC.2014.7151183","DOIUrl":null,"url":null,"abstract":"In this paper, the influence of gate-source and drain-source bias on the bias-stress stability and lifetime of pentacene-based low-voltage (-3 V) organic thin-film transistors (TFTs) built on plastic substrate has been investigated. The 10%-current-decay lifetime is used for analyzing the influence of applied bias on the bias-stress stability of TFTs, and to compare various biasing conditions. Our results show a 3 to 4 times higher 10%-current-decay lifetime when magnitude of gate-source and drain-source voltage are equal and less than 2.5 V during bias stress, compared to that when drain-source voltage is kept at -3.0 V.","PeriodicalId":186054,"journal":{"name":"2014 IEEE 2nd International Conference on Emerging Electronics (ICEE)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Influence of gate and drain bias on the bias-stress stability of flexible organic thin-film transistors\",\"authors\":\"Sibani Bisoyi, S. P. Tiwari, U. Zschieschang, H. Klauk\",\"doi\":\"10.1109/ICEMELEC.2014.7151183\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, the influence of gate-source and drain-source bias on the bias-stress stability and lifetime of pentacene-based low-voltage (-3 V) organic thin-film transistors (TFTs) built on plastic substrate has been investigated. The 10%-current-decay lifetime is used for analyzing the influence of applied bias on the bias-stress stability of TFTs, and to compare various biasing conditions. Our results show a 3 to 4 times higher 10%-current-decay lifetime when magnitude of gate-source and drain-source voltage are equal and less than 2.5 V during bias stress, compared to that when drain-source voltage is kept at -3.0 V.\",\"PeriodicalId\":186054,\"journal\":{\"name\":\"2014 IEEE 2nd International Conference on Emerging Electronics (ICEE)\",\"volume\":\"51 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 IEEE 2nd International Conference on Emerging Electronics (ICEE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICEMELEC.2014.7151183\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE 2nd International Conference on Emerging Electronics (ICEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEMELEC.2014.7151183","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Influence of gate and drain bias on the bias-stress stability of flexible organic thin-film transistors
In this paper, the influence of gate-source and drain-source bias on the bias-stress stability and lifetime of pentacene-based low-voltage (-3 V) organic thin-film transistors (TFTs) built on plastic substrate has been investigated. The 10%-current-decay lifetime is used for analyzing the influence of applied bias on the bias-stress stability of TFTs, and to compare various biasing conditions. Our results show a 3 to 4 times higher 10%-current-decay lifetime when magnitude of gate-source and drain-source voltage are equal and less than 2.5 V during bias stress, compared to that when drain-source voltage is kept at -3.0 V.