具有高回转放大器的14位20 m采样/s的流水线A/D转换器

Proceedings of the 2004 IEEE Dallas/CAS Workshop Implementation of High Performance Circuits Pub Date : 2004-11-30 DOI:10.1109/DCAS.2004.1360447

M. Kinyua, F. Maloberti, W. Gosney

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引用次数: 3

摘要

本文介绍了一种采用互补SiGe/SOI双极工艺设计的14位20MSPS开关电容流水线ADC。它具有输入到输出A/B类运算放大器，设计用于驱动10pf的大型采样电容而不消耗过多功率。原型实现显示，在2 MHz输入信号下，测量到的INL为+/- 2.0 LSB, DNL为+/- 0.5 LSB，信噪比为73 dB, SFDR为85 dB。在最低放大器偏置设置下，模拟功耗为390mw，电源为5v。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 14-bit 20-Msamples/s pipelined A/D converter with high slewing amplifier

This paper describes a 14-bit 20MSPS switched-capacitor pipelined ADC designed in a complementary SiGe/SOI bipolar process. It features an input-to-output class A/B operational amplifier designed to drive large sampling capacitors of 10 pF without consuming excessive power. Prototype implementation exhibits measured INL of +/- 2.0 LSB, DNL of +/- 0.5 LSB, SNR of 73 dB and SFDR of 85 dB with a 2 MHz input signal. Analog power dissipation at lowest amplifier bias setting is 390 mW with 5 V supply.

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Proceedings of the 2004 IEEE Dallas/CAS Workshop Implementation of High Performance Circuits

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