一种新型电场减小结构的500v 1A单片逆变电路

Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics Pub Date : 1994-05-31 DOI:10.1109/ISPSD.1994.583792

K. Endo, Y. Baba, Y. Udo, M. Yasui, Y. Sano

{"title":"一种新型电场减小结构的500v 1A单片逆变电路","authors":"K. Endo, Y. Baba, Y. Udo, M. Yasui, Y. Sano","doi":"10.1109/ISPSD.1994.583792","DOIUrl":null,"url":null,"abstract":"A 500 V 1 A three-phase inverter IC has been developed by using a new electric field reduction structure SRFP (Scroll shaped Resistive-Field-Plate). This HV-IC process is a BiCMOS process with a dielectric isolated (DI) wafer. Si wafer direct bonding (SDB) technique is applied to the DI wafer. Output devices are lateral IGBTs with high-speed collector structures. Without SIPOS, an SRFP has the same field reduction effect and the same electric shield effect as a SIPOS-RFP. In this report, we show that turn off time of IGBT depends on N/sup +/ pattern in the collector and existence of P/sup +/ layer around the DI area. High-speed (280 nsec) and low saturation (2.8 V) voltage IGBTs are realized by using optimization of collector pattern.","PeriodicalId":405897,"journal":{"name":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1994-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"31","resultStr":"{\"title\":\"A 500 V 1A 1-chip inverter IC with a new electric field reduction structure\",\"authors\":\"K. Endo, Y. Baba, Y. Udo, M. Yasui, Y. Sano\",\"doi\":\"10.1109/ISPSD.1994.583792\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 500 V 1 A three-phase inverter IC has been developed by using a new electric field reduction structure SRFP (Scroll shaped Resistive-Field-Plate). This HV-IC process is a BiCMOS process with a dielectric isolated (DI) wafer. Si wafer direct bonding (SDB) technique is applied to the DI wafer. Output devices are lateral IGBTs with high-speed collector structures. Without SIPOS, an SRFP has the same field reduction effect and the same electric shield effect as a SIPOS-RFP. In this report, we show that turn off time of IGBT depends on N/sup +/ pattern in the collector and existence of P/sup +/ layer around the DI area. High-speed (280 nsec) and low saturation (2.8 V) voltage IGBTs are realized by using optimization of collector pattern.\",\"PeriodicalId\":405897,\"journal\":{\"name\":\"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-05-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"31\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD.1994.583792\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.1994.583792","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 31

摘要

采用涡旋形电阻场板(SRFP)的新型电场减小结构，研制了一种500v 1a三相逆变电路。该HV-IC工艺是采用介电隔离(DI)晶圆的BiCMOS工艺。将硅晶片直接键合(SDB)技术应用于DI晶片。输出器件是具有高速集电极结构的横向igbt。没有SIPOS的SRFP具有与SIPOS- rfp相同的场抑制效果和电屏蔽效果。在本报告中，我们证明了IGBT的关闭时间取决于集热器中的N/sup +/模式和DI区域周围是否存在P/sup +/层。通过优化集电极模式，实现了高速(280 nsec)和低饱和(2.8 V)电压的igbt。

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A 500 V 1A 1-chip inverter IC with a new electric field reduction structure

A 500 V 1 A three-phase inverter IC has been developed by using a new electric field reduction structure SRFP (Scroll shaped Resistive-Field-Plate). This HV-IC process is a BiCMOS process with a dielectric isolated (DI) wafer. Si wafer direct bonding (SDB) technique is applied to the DI wafer. Output devices are lateral IGBTs with high-speed collector structures. Without SIPOS, an SRFP has the same field reduction effect and the same electric shield effect as a SIPOS-RFP. In this report, we show that turn off time of IGBT depends on N/sup +/ pattern in the collector and existence of P/sup +/ layer around the DI area. High-speed (280 nsec) and low saturation (2.8 V) voltage IGBTs are realized by using optimization of collector pattern.

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Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics

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