高性能SOI数字CMOS VLSI的设计挑战

1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453) Pub Date : 1999-06-08 DOI:10.1109/VTSA.1999.786052

C. Chuang

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引用次数: 3

摘要

本文综述了SOI在高性能数字CMOS VLSI应用中的最新进展。高性能、通用微处理器应用的技术/设备要求和设计问题/挑战与低功耗便携式应用不同。特别强调了部分耗尽器件中浮体对电路运行、稳定性和功能的影响。解决了独特的SOI设计方面，如寄生双极效应和滞后V/sub / T/变化。讨论了提高抗扰性的电路技术和总体设计问题。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Design challenges for high-performance SOI digital CMOS VLSI

This paper reviews the recent advances of SOI for high-performance digital CMOS VLSI applications. The technology/device requirements and design issues/challenges for high-performance, general-purpose microprocessor applications are differentiated with respect to low-power portable applications. Particular emphasis is placed on the impact of floating-body in partially-depleted devices on the circuit operation, stability, and functionality. Unique SOI design aspects such as the parasitic bipolar effect and hysteretic V/sub T/ variation are addressed. Circuit techniques to improve the noise immunity and global design issues are discussed.

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来源期刊

1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453)

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