{"title":"可靠的PN芯片时钟生成CDMA码采集和跟踪","authors":"H. Oh, Hyun-Chul Kim, C. Kang, Jungyoung Son","doi":"10.1109/ISCE.1997.658383","DOIUrl":null,"url":null,"abstract":"We propose a new PN chip clock generator which employs two synchronous counters to achieve precise control of chip clock in a CDMA code acquisition and code tracking. The proposed clock generator provides a reliable clock without any glitch. Since the chip clock generator can be easily controlled into one of the states: free running, phase advance and phase delay, it can be used for both data processing and code synchronization.","PeriodicalId":393861,"journal":{"name":"ISCE '97. Proceedings of 1997 IEEE International Symposium on Consumer Electronics (Cat. No.97TH8348)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1997-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Reliable PN chip clock generation for CDMA code acquisition and tracking\",\"authors\":\"H. Oh, Hyun-Chul Kim, C. Kang, Jungyoung Son\",\"doi\":\"10.1109/ISCE.1997.658383\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We propose a new PN chip clock generator which employs two synchronous counters to achieve precise control of chip clock in a CDMA code acquisition and code tracking. The proposed clock generator provides a reliable clock without any glitch. Since the chip clock generator can be easily controlled into one of the states: free running, phase advance and phase delay, it can be used for both data processing and code synchronization.\",\"PeriodicalId\":393861,\"journal\":{\"name\":\"ISCE '97. Proceedings of 1997 IEEE International Symposium on Consumer Electronics (Cat. No.97TH8348)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-12-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ISCE '97. Proceedings of 1997 IEEE International Symposium on Consumer Electronics (Cat. No.97TH8348)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCE.1997.658383\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ISCE '97. Proceedings of 1997 IEEE International Symposium on Consumer Electronics (Cat. No.97TH8348)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCE.1997.658383","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Reliable PN chip clock generation for CDMA code acquisition and tracking
We propose a new PN chip clock generator which employs two synchronous counters to achieve precise control of chip clock in a CDMA code acquisition and code tracking. The proposed clock generator provides a reliable clock without any glitch. Since the chip clock generator can be easily controlled into one of the states: free running, phase advance and phase delay, it can be used for both data processing and code synchronization.