{"title":"具有直接二进制输出的ADC架构,用于高频SMPS的数字控制器","authors":"Tao Zhou, Jianping Xu","doi":"10.1109/IPEMC.2006.4778154","DOIUrl":null,"url":null,"abstract":"Without adopting encoder to convert \"thermometer code\" into binary code, analog-to-digital converter (ADC) architecture with direct binary code output is proposed for digital controllers of high-frequency switching mode power supply (SMPS). It can provide large conversion ranges with required precision and reduce ADC circuit complexity. The output can be compressed into a much shorter addressing character in logarithmic law and lead to reduction of memory size in the look-up table of the digital compensator","PeriodicalId":448315,"journal":{"name":"2006 CES/IEEE 5th International Power Electronics and Motion Control Conference","volume":"83 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"ADC architecture with direct binary output for digital controllers of high-frequency SMPS\",\"authors\":\"Tao Zhou, Jianping Xu\",\"doi\":\"10.1109/IPEMC.2006.4778154\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Without adopting encoder to convert \\\"thermometer code\\\" into binary code, analog-to-digital converter (ADC) architecture with direct binary code output is proposed for digital controllers of high-frequency switching mode power supply (SMPS). It can provide large conversion ranges with required precision and reduce ADC circuit complexity. The output can be compressed into a much shorter addressing character in logarithmic law and lead to reduction of memory size in the look-up table of the digital compensator\",\"PeriodicalId\":448315,\"journal\":{\"name\":\"2006 CES/IEEE 5th International Power Electronics and Motion Control Conference\",\"volume\":\"83 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 CES/IEEE 5th International Power Electronics and Motion Control Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPEMC.2006.4778154\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 CES/IEEE 5th International Power Electronics and Motion Control Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPEMC.2006.4778154","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
ADC architecture with direct binary output for digital controllers of high-frequency SMPS
Without adopting encoder to convert "thermometer code" into binary code, analog-to-digital converter (ADC) architecture with direct binary code output is proposed for digital controllers of high-frequency switching mode power supply (SMPS). It can provide large conversion ranges with required precision and reduce ADC circuit complexity. The output can be compressed into a much shorter addressing character in logarithmic law and lead to reduction of memory size in the look-up table of the digital compensator