{"title":"用于生物医学应用的1-V 32µW 13位CMOS Sigma-Delta A/D转换器","authors":"Kunalan s/o Muthusamy, T. Hui Teo, Y. Xu","doi":"10.1109/ASICON.2009.5351498","DOIUrl":null,"url":null,"abstract":"This paper describes a low power, low voltage Sigma-Delta Analog to Digital Converter which consists of a Sigma-Delta modulator (SDM) and a decimation digital filter. A power efficient class AB OP-AMP, derived from inverter-like amplifier circuit, is proposed and a modified digital filter structure is employed for low frequency operation. Designed in a 0.18-µm CMOS technology, the overall SD-ADC is able to achieve an ENOB of 13.4 bit, a dynamic range of 88.6 dB and a peak SNR of 82.7 dB. The total power consumption of the ADC is 32 µW.","PeriodicalId":446584,"journal":{"name":"2009 IEEE 8th International Conference on ASIC","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A 1-V 32-µW 13-bit CMOS Sigma-Delta A/D converter for biomedical applications\",\"authors\":\"Kunalan s/o Muthusamy, T. Hui Teo, Y. Xu\",\"doi\":\"10.1109/ASICON.2009.5351498\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a low power, low voltage Sigma-Delta Analog to Digital Converter which consists of a Sigma-Delta modulator (SDM) and a decimation digital filter. A power efficient class AB OP-AMP, derived from inverter-like amplifier circuit, is proposed and a modified digital filter structure is employed for low frequency operation. Designed in a 0.18-µm CMOS technology, the overall SD-ADC is able to achieve an ENOB of 13.4 bit, a dynamic range of 88.6 dB and a peak SNR of 82.7 dB. The total power consumption of the ADC is 32 µW.\",\"PeriodicalId\":446584,\"journal\":{\"name\":\"2009 IEEE 8th International Conference on ASIC\",\"volume\":\"19 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-12-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE 8th International Conference on ASIC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASICON.2009.5351498\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE 8th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASICON.2009.5351498","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 1-V 32-µW 13-bit CMOS Sigma-Delta A/D converter for biomedical applications
This paper describes a low power, low voltage Sigma-Delta Analog to Digital Converter which consists of a Sigma-Delta modulator (SDM) and a decimation digital filter. A power efficient class AB OP-AMP, derived from inverter-like amplifier circuit, is proposed and a modified digital filter structure is employed for low frequency operation. Designed in a 0.18-µm CMOS technology, the overall SD-ADC is able to achieve an ENOB of 13.4 bit, a dynamic range of 88.6 dB and a peak SNR of 82.7 dB. The total power consumption of the ADC is 32 µW.
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