{"title":"光通信系统高速电路的设计","authors":"Behzad Razavi","doi":"10.1109/CICC.2001.929789","DOIUrl":null,"url":null,"abstract":"This paper presents the design of circuits and architectures for optical communication transceivers. First, a system overview illustrating the challenges in high-speed implementations is given. Next, the design of transimpedance amplifiers and limiters is discussed and the problem of clock and data recovery is addressed. Finally, jitter issues and methods of estimating the jitter are introduced.","PeriodicalId":101717,"journal":{"name":"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"20","resultStr":"{\"title\":\"Design of high-speed circuits for optical communication systems\",\"authors\":\"Behzad Razavi\",\"doi\":\"10.1109/CICC.2001.929789\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design of circuits and architectures for optical communication transceivers. First, a system overview illustrating the challenges in high-speed implementations is given. Next, the design of transimpedance amplifiers and limiters is discussed and the problem of clock and data recovery is addressed. Finally, jitter issues and methods of estimating the jitter are introduced.\",\"PeriodicalId\":101717,\"journal\":{\"name\":\"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)\",\"volume\":\"48 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-05-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"20\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2001.929789\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2001.929789","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of high-speed circuits for optical communication systems
This paper presents the design of circuits and architectures for optical communication transceivers. First, a system overview illustrating the challenges in high-speed implementations is given. Next, the design of transimpedance amplifiers and limiters is discussed and the problem of clock and data recovery is addressed. Finally, jitter issues and methods of estimating the jitter are introduced.