用于高性能VLSI架构的64位多匹配优先编码器(MPE64)

A. Pradeep, S. Radha, Nestham Sujay, Panchagnula Venkata Janaki Ram, G. V. Ganesh, P. Nagabushanam
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引用次数: 0

摘要

编码器是数字存储、记忆技术的关键。有许多方法可以提高编码器的性能。在本文中,我们考虑了8位和64位优先级编码器,其中输入中的LSB位被赋予更高的优先级,并且优先级在编码器处理之前进行。因此,64位的延迟至少是8位延迟的8倍。进一步使用多匹配优先级,其中输入64位被分成8个部分,优先级在编码器之前完成,从而提高了性能。仿真在Xilinx中进行。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
64-bit Multi-match Priority Encoder (MPE64) for High Performance VLSI Architectures
Encoders are crucial for digital storage, memory technologies. There exist many approaches to increase the performance of encoders. In this paper, we considered 8-bit and 64-bit prioritized encoders, where LSB bit in the input is given higher priority and prioritization is carried out prior to encoder process. Thereby, latency in 64-bit is at least 8 times that of latency in 8-bit. Further using multi-match priority in which input 64 bit is split into 8 sections and prioritization is done prior to encoder which improves the performance. Simulation is carried out in Xilinx.
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