流水线分拣芯片

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1987.1157107

N. Tsuda, T. Satoh, T. Kawada

{"title":"流水线分拣芯片","authors":"N. Tsuda, T. Satoh, T. Kawada","doi":"10.1109/ISSCC.1987.1157107","DOIUrl":null,"url":null,"abstract":"A 3μm, double metal CMOS pipeline sorter ship that selects 80 16-byte records at a 3Mbytes/s throughput rate will be disclosed. The 37×21mm chip uses hierarchical redundancy and laser repair to increase yield by 10× with an eara of only 1.9×.","PeriodicalId":102932,"journal":{"name":"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A piepline sorting chip\",\"authors\":\"N. Tsuda, T. Satoh, T. Kawada\",\"doi\":\"10.1109/ISSCC.1987.1157107\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 3μm, double metal CMOS pipeline sorter ship that selects 80 16-byte records at a 3Mbytes/s throughput rate will be disclosed. The 37×21mm chip uses hierarchical redundancy and laser repair to increase yield by 10× with an eara of only 1.9×.\",\"PeriodicalId\":102932,\"journal\":{\"name\":\"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"55 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1987.1157107\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1987.1157107","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 4

摘要

将公开一种3μm的双金属CMOS流水线分拣船，以3mb /s的吞吐量选择80条16字节的记录。37×21mm芯片使用分层冗余和激光修复，以仅1.9倍的损耗将产量提高10倍。

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A piepline sorting chip

A 3μm, double metal CMOS pipeline sorter ship that selects 80 16-byte records at a 3Mbytes/s throughput rate will be disclosed. The 37×21mm chip uses hierarchical redundancy and laser repair to increase yield by 10× with an eara of only 1.9×.

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来源期刊

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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