{"title":"用线性边界元并行计算三维寄生电阻和寄生电容","authors":"Wenming Zhou, Zeyi Wang, Lan Rao","doi":"10.1109/ASPDAC.1997.600200","DOIUrl":null,"url":null,"abstract":"Because of the widespread application of deep sub-micron and multilayer routing techniques, the interconnection parasitic influence has more and more effect on the performance of VLSI circuits. Parallel direct boundary element calculation of three-dimensional (3-D) resistance and capacitance is an important method for fast extraction. In this paper, a parallel algorithm to implement linear boundary element calculation using PVM (Parallel Virtual Machine, distributed calculating software) is introduced. The hierarchical calculation scheme of the setup and solution processes of linear equations is discussed. At the end, the performance and workload balance of the algorithm are analyzed.","PeriodicalId":242487,"journal":{"name":"Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference","volume":"68 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-01-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Parallel calculation of 3-D parasitic resistance and capacitance with linear boundary elements\",\"authors\":\"Wenming Zhou, Zeyi Wang, Lan Rao\",\"doi\":\"10.1109/ASPDAC.1997.600200\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Because of the widespread application of deep sub-micron and multilayer routing techniques, the interconnection parasitic influence has more and more effect on the performance of VLSI circuits. Parallel direct boundary element calculation of three-dimensional (3-D) resistance and capacitance is an important method for fast extraction. In this paper, a parallel algorithm to implement linear boundary element calculation using PVM (Parallel Virtual Machine, distributed calculating software) is introduced. The hierarchical calculation scheme of the setup and solution processes of linear equations is discussed. At the end, the performance and workload balance of the algorithm are analyzed.\",\"PeriodicalId\":242487,\"journal\":{\"name\":\"Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference\",\"volume\":\"68 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-01-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASPDAC.1997.600200\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.1997.600200","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Parallel calculation of 3-D parasitic resistance and capacitance with linear boundary elements
Because of the widespread application of deep sub-micron and multilayer routing techniques, the interconnection parasitic influence has more and more effect on the performance of VLSI circuits. Parallel direct boundary element calculation of three-dimensional (3-D) resistance and capacitance is an important method for fast extraction. In this paper, a parallel algorithm to implement linear boundary element calculation using PVM (Parallel Virtual Machine, distributed calculating software) is introduced. The hierarchical calculation scheme of the setup and solution processes of linear equations is discussed. At the end, the performance and workload balance of the algorithm are analyzed.