SOI中的感测放大器设计

2005 IEEE International SOI Conference Proceedings Pub Date : 2005-12-27 DOI:10.1109/SOI.2005.1563559

M. Golden, J. Tran, B. McGee, B. Kuo

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引用次数: 5

摘要

微处理器需要尖端技术来提供具有竞争力的性能。AMD生产的微处理器采用90nm、triple-Vt、SOI工艺。在这个过程中，由工艺变化引起的静态晶体管失配和由SOI效应引起的动态晶体管失配相结合，增加了sram中使用的感测放大器电路的输入参考偏置。一项比较不同感测放大器拓扑结构的硅实验表明，体系晶体管在不降低性能的情况下显著改善了输入参考偏置。

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Sense amp design in SOI

Microprocessors require cutting edge technology to deliver competitive performance. AMD manufactures microprocessors in a 90nm, triple-Vt, SOI process. In this process, static transistor mismatch, caused by process variation, and dynamic transistor mismatch, caused by SOI effects, combine to increase the input referred offset of sense amplifier circuits used in SRAMs. A silicon experiment comparing different sense amp topologies reveals that body-tied transistors provide significant improvement in input referred offset without performance degradation.

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2005 IEEE International SOI Conference Proceedings

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